This application is based upon and claims the benefit of Japanese Patent Application No. 11-25410 filed on Feb. 2, 1999, the contents of which are incorporated herein by reference.
1. Field of the Invention
This invention relates generally to a semiconductor device having an SOI (Silicon On Insulator) structure, and particularly to an IC for outputting a high voltage with several steps to drive a flat panel display such as an electroluminescent (EL) display or a plasma display.
2. Description of the Related Art
An insulating isolation type high voltage IC includes several high withstand voltage elements. In the high voltage IC, as shown in FIGS. 14 and 15, elements 101 are respectively connected to power supply lines for applying a power supply voltage Vdd, and elements 102 are connected to GND lines for applying a ground potential. Further, the elements 101, 102 are respectively surrounded by trenches 103 to thereby being electrically isolated from each other.
When the outside of the trenches 103 is fixed to the GND potential in the high voltage IC, no voltage is applied to the trenches 103 surrounding the elements 102 which are connected to the GND lines. However, the power supply voltage is applied to other trenches 103 surrounding the elements 101 which are connected to the power supply lines. In this case, thermally oxidized layers 104 formed in the trenches 103 should be thickened to prevent dielectric breakdown thereof from being caused by the power supply voltage applied to the trenches 103.
When the thermally oxidized layers 104 are thickened, however, crystal defects are easily produced at interfaces between the thermally oxidized layers 104 and a silicon layer 105 constituting the elements 101, 102 due to a difference in thermal expansion coefficient between the thermally oxidized layers 104 and the silicon layer 105.
The present invention has been made in view of the above problem. An object of the present invention is to provide a semiconductor device having a trench for insulating isolation and an oxide film filling the trench with a decreased thickness.
According to the present invention, a plurality of first semiconductor elements, which have a first electric potential, are surrounded by a plurality of first trenches. A plurality of second semiconductor elements, which have a second electric potential smaller than the first electric potential, are surrounded by a plurality of second trenches. The first trenches are further surrounded by a third trench, and the second trenches are further surrounded by a fourth trench. A silicon layer extending between the first trenches and the third trench has a third electric potential larger than the second electric potential. Preferably the third electric potential is substantially equal to the first electric potential.
In this case, no voltage is applied across the first trenches, so that oxide layers filling the first trenches can be thinned. Crystal defects are hardly produced by a difference in thermal expansion coefficient between the oxide layer and the silicon layer. For example, each thickness T of the oxide layers can be set to satisfy a formula of T less than V/E, in which V represents a potential difference between the first and second electric potentials, and E represents a breakdown electric field strength of the oxide layers.
According to the present invention, a first trench surrounds all of a plurality of first semiconductor elements, and a second trench surrounds all of a plurality of second semiconductor elements. A portion of a silicon layer extending outside the first and second trenches is electrically floating. In this case, a potential difference between first and second electric potentials of the first and second semiconductor elements can be supported by the first and second trenches. As a result, oxide layers filling the first and second trenches can be thinned as well.